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Cache memory
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#	Item
321	The Cache Performance of Blocked Monica S. Lam, Add to Reading List Source URL: suif.stanford.edu Language: English - Date: 2003-10-16 22:29:20 Computer hardware Compiler optimizations CPU cache Central processing unit Data Memory hierarchy Cache-oblivious algorithm Loop tiling Cache Computer memory Computing
322	Lecture 10: Memory Hierarchy—3 Cs and 7 Ways to Reduce Misses Professor David A. Patterson Computer Science 252 Spring 1998 Add to Reading List Source URL: www.cs.berkeley.edu Language: English - Date: 1998-02-26 13:05:55 Computing Cache CPU cache Alpha 21164 Dynamic random-access memory Memory hierarchy Computer architecture Computer memory Computer hardware Central processing unit
323	Probabilistic Instruction Cache Analysis using Bayesian Networks Mark Bartlett, Iain Bate, James Cussens and Dimitar Kazakov Department of Computer Science University of York York, UK Add to Reading List Source URL: www.cs.york.ac.uk Language: English - Date: 2012-05-02 15:17:12 Cache CPU cache Central processing unit Computer memory Bayesian network Graphical model Bayesian inference Worst-case execution time Acumem SlowSpotter Statistics Bayesian statistics Statistical models
324	Lecture 18: Multiprocessors 2: Snooping v. Directory Coherency, Memory Consistency Models Professor David A. Patterson Computer Science 252 Add to Reading List Source URL: www.cs.berkeley.edu Language: English - Date: 1998-04-10 13:28:22 MESI protocol CPU cache Cache Central processing unit Write-once Cache coherency Computer hardware Computing
325	On Memory-Bound Functions for Fighting Spam Cynthia Dwork1 , Andrew Goldberg1, and Moni Naor2? 1 Microsoft Research, SVC 1065 L’Avenida Add to Reading List Source URL: www.hashcash.org Language: English - Date: 2005-01-15 19:23:52 Computer memory Statistics CPU cache Central processing unit Lookup table Bit array Random walk Logarithm Cache-oblivious algorithm Computing Arrays Cache
326	FP 14.1 Intelligent RAM (IRAM): Chips that remember and compute David Patterson, Thomas Anderson, Neal Cardwell, Richard Fromm, Kimberley Keeton, Christoforos Kozyrakis, Randi Thomas, and Kathy Yelick Computer Science/EE Add to Reading List Source URL: iram.cs.berkeley.edu Language: English - Date: 1997-02-12 03:04:51 CPU cache Alpha 21164 Dynamic random-access memory The Berkeley IRAM Project PA-8000 Computer memory Computer hardware Computing
327	Instruction Cache Prediction Using Bayesian Networks Mark Bartlett and Iain Bate and James Cussens1 Abstract. Storing instructions in caches has led to dramatic increases in the speed at which programs can execute. Howev Add to Reading List Source URL: www.cs.york.ac.uk Language: English - Date: 2012-05-02 15:17:20 Computer memory Bayesian network Information Electronics Electronic engineering Cache pollution Classic RISC pipeline Cache CPU cache Central processing unit
328	The Effects of Memory-Rich Environments on File System Microbenchmarks An-I A. Wang, Computer Science Department UCLA, Geoffrey Kuenning, Computer Science Department, Harvey Mudd College, geoff@cs. Add to Reading List Source URL: lasr.cs.ucla.edu Language: English - Date: 2003-10-29 13:35:14 Computer performance CPU cache Cache Central processing unit Software optimization Bonnie++ Fragmentation File system fragmentation Log-structured file system Computing Computer memory Computer hardware
329	FPGA Implementa.on of a  Conﬁgurable Cache/Scratchpad Memory  with Virtualized User‐Level RDMA Capability  G. Kalokerinos, V. Papaefstathiou, G. Nikiforos,  S. Kavadias, M. K Add to Reading List Source URL: www.ics.forth.gr Language: English - Date: 2013-12-23 07:16:59 Remote direct memory access Cache Computing Computer memory Local area networks Scratchpad memory
330	FPGA Implementation of a Configurable Cache/Scratchpad Memory with Virtualized User-Level RDMA Capability George Kalokerinos, Vassilis Papaefstathiou, George Nikiforos, Stamatis Kavadias, Manolis Katevenis, Dionisios Pne Add to Reading List Source URL: www.ics.forth.gr Language: English - Date: 2013-12-23 07:16:59 CPU cache Scratchpad memory Direct memory access Cache Remote direct memory access AMD 10h Memory hierarchy Cell Synchronous dynamic random-access memory Computer memory Computer hardware Computing

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